Alterungsanalyse komplexer analoger integrierter Schaltungen aus Systemsicht

The design of analog circuits ranges from the specifications on system level, the selection of a suitable circuit topology up to the choice of the concrete physical dimensions of components like transistors. The individual steps are performed within computer-aided design environments. These environments are based on a database made available by the semiconductor manufacturers containing process parameters and influences on the components. In particular, the influences to be considered in the design have increased in recent years due to the continuous reduction of the producible structural sizes. Thus, it must be possible to analyze the deviations due to process, temperature, time degradation and, for special applications, radiation influences during the design phase. Conventional approaches regard these additional effects as standing next to the actual design process. As a result, the latter is no longer consistent and it is much more complex to consider different circuits and effects on different abstraction levels within the design flow. The focus of this work lies on the development of a consistent consideration of process, voltage, temperature, aging and radiation influences (PVTAR) during the entire design process of analog circuits to the initial measurement of manufactured circuits. To achieve this goal, a transistor model was extended by the influences to be considered. Thereby, the analysis of the additional effects is seamlessly integrated into conventional design processes and methods. In addition, the possibility of a structured analog design is evaluated. This approach allows the estimation of PVTAR influences on dedicated analog function blocks and their propagation on circuit level. Thus, the enormous simulation effort associated with aging analyses can be reduced. The design and manufacture of circuits is always followed by the measurement of the core properties of these circuits. In the context of this work a method was developed which makes it possible to use all insights from the design of a circuit for the improvement of the measuring results. In addition, the internal parameter sets of individual components can be inferred from the terminal behavior of circuits and systems. Finally, the results of the measurement method can be used for the automated calculation of circuit reliability parameters

Aging analysis of complex analog integrated circuits from a system perspective

The design of analog circuits ranges from the specifications on system level, the selection of a suitable circuit topology up to the choice of the concrete physical dimensions of components like transistors. The individual steps are performed within computer-aided design environments. These environments are based on a database made available by the semiconductor manufacturers containing process parameters and influences on the components. In particular, the influences to be considered in the design have increased in recent years due to the continuous reduction of the producible structural sizes. Thus, it must be possible to analyze the deviations due to process, temperature, time degradation and, for special applications, radiation influences during the design phase. Conventional approaches regard these additional effects as standing next to the actual design process. As a result, the latter is no longer consistent and it is much more complex to consider different circuits and effects on different abstraction levels within the design flow. The focus of this work lies on the development of a consistent consideration of process, voltage, temperature, aging and radiation influences (PVTAR) during the entire design process of analog circuits to the initial measurement of manufactured circuits. To achieve this goal, a transistor model was extended by the influences to be considered. Thereby, the analysis of the additional effects is seamlessly integrated into conventional design processes and methods. In addition, the possibility of a structured analog design is evaluated. This approach allows the estimation of PVTAR influences on dedicated analog function blocks and their propagation on circuit level. Thus, the enormous simulation effort associated with aging analyses can be reduced. The design and manufacture of circuits is always followed by the measurement of the core properties of these circuits. In the context of this work a method was developed which makes it possible to use all insights from the design of a circuit for the improvement of the measuring results. In addition, the internal parameter sets of individual components can be inferred from the terminal behavior of circuits and systems. Finally, the results of the measurement method can be used for the automated calculation of circuit reliability parameters

SCIPIO—Scientific Purification Indicator

This paper presents a new way of dealing with drinkable water shortness all over the world. The developed devices’ functionality is based on the well-known and established SODIS (SOlar DISinfection) method. The whole device, Scipio—Scientific Purification Indicator, is designed in a way, that it is self-powered by solar cells and can be placed inside a bottle in order to provide best measurements. The device is capable of communicate via Bluetooth with other devices. Thus, an observation or control of the correct application of the SODIS method can be established. The paradigm shift we offer in terms of development aid not to simply help the people but to empower them to care for themselves. It is a very important that everyone can purify their own drinking water without the need of subsequent supplies

On-Line Error Correction in Sensor Interface Circuits by Using Adaptive Filtering and Digital Calibration

Numerous non-ideal effects can distort the functionality of sensor interfaces and have to be considered during the design phase. In order to relax the requirements for the analog circuit components, adaptive filtering and digital calibration are used in this work to detect and correct different gain- and offset-errors. The error detection is performed by transmitting a test signal through the sensor interface continuously and in parallel to the sensor signal. In the digital domain, variations of the test signal are evaluated and present errors can be determined and eliminated. In this way, an on-line error correction is realized, which makes the sensor interface more robust against static and dynamic non-idealities. The proposed concept is demonstrated by correcting different gain- and offset-errors in a 65nm CMOS sensor interface